520.490 Analog and Digital VLSI Systems

Variable Resolution Kernel Imager

Aron Baik & Julius Lim
Graduate Advisor: Roman Genov



Final Layout with PadFrame



The variable resolution kernel imager is designed to capture images at varying resolutions. A possible application with our chip is for scanning low resolution images that can be easily processed by microcontrollers and DSP's. Higher resolution images could be obtained if desired, but at the expense of heavier data processing. In addition, the chip can be used to implement kernel imaging with any arbitrary kernel with positive values.



The variable resolution imaging is implemented using a logarithmic shifter and a current integrator. Our chip has a high density array of 128 x 128 Active Pixel Sensors (APS), a column of 7-bit row decoders, a shift barrel network, a row of 128 integrators, and a row of 7-bit column select mux.



The Active Pixel Sensors (APS) has a fill factor of approximately 40%. Each APS is exactly 40λ by 40λ. The current output from the APS is directly proportional to light intensity. No reset signal is used for the APS, instead a bias voltage is used. 

The shift barrel network Design:


Current Integrator Design:


Row decoder design:


The basic operation of the Variable Resolution / Kernel Imager Chip is as follow:

  1. Raise RS (reset) signal high to clear all integrators;

  2. Provide A<6:0> (row address) to select a row;

  3. Provide SH8, SH4, SH2, SH1 (log shift) to choose shift barrel alignment (0 to 15);

  4. Pulse AC (accumulate) signal to integrate pixel;

  5. Repeat steps 3 & 4 until the entire row is sampled;

  6. Repeat steps 2 through 5 to sample various rows as required by the kernel;

  7. Provide B<6:0> (column address) to select a column;

  8. Pulse RD (read) to get a voltage reading;

  9. Repeat steps 7 & 8 until every column pixels are read;

  10. Repeat steps 1 through 9 to sample the complete image.



Current Integrator Spice:



D. J. Johns and K. Martin, Analog Integrated Circuit Design, Wiley, 1997.

J. E. Franca and Y. Tsividis, Eds., Design of Analog-Digital VLSI Circuits for Telecommunications, Prentice-Hall, 1994.

Randall Geiger, Phillip Allen, Noel Strader, VLSI Design Techniques for Analog and Digital Circuits, McGraw-Hill.