Multi-Octave 4-Channel Tone Synthesis With Magnitude Select

We chose [131 - 247]Hz to be one octave below middle, [262 - 494]Hz to be the middle octave, and [523 - 988]Hz to be one octave above middle. The middle A was chosen to be 440Hz according to current standards. Each of our octaves went from C to B. In the music world this means our three octaves are C1 to B2, C2 to B3, and C3 to B4. The actual frequency values we used can be found in a chart here: [1].

In order to achieve a square wave of proper frequency with a 50% duty cycle, we modified an idea found in an IEEE paper: [2]. The basic idea is to divide the clock frequency by the desired frequency and use this number as a value that a counter will count up to. These values are stored in a lookup table according to the table listed above. The actual count values were determined for the highest frequency octave because it would have the most potential error. The lower and middle octaves use the same count values, but have external clock splitters and internal logic to decide which clock it uses. A comparator is used to compare the counter value with the desired value in the lookup table. When the two values are equal, the comparator will output a clock pulse and reset the counter. These pulses go into a flip flop set up as a clock splitter which will create a clock output with a 50% duty cycle every two pulses.

To choose an appropriate clock frequency, we went onto Digikey's website and found the cheapest and most common frequencies on the crystals it sold. We found about eight different common frequency values from 40KHz to 250Khz, and wrote a simple matlab program to determine which frequency would have the least squared error in approximating the highest octave's frequencies. The frequency with the least error turned out to be 120Khz, so we designed our lookup table with that value in mind.

Each 'channel' has a 7-bit counter, 8-bit comparator and 8-bit register. The counter only needs 7 bits because in order to have the proper frequency output, the lowest order bit is the clock itself, effectively making it an 8-bit counter. The 8-bit register just stores the value of the count value found in the lookup table every time the channel is written to. Each channel also has another four flip flops to hold data on the octave and amplitude of each note, which are used to determine which clock input to take and the magnitude of the tone for the summing amplifier.

Layout of each channel - with counter, comparator and registers

Analog:

The analog portion of this project can be further split into two parts as well: the summing amplifer and the Butterworth low pass filter. All of the important biasing and reference voltages for the analog parts are off chip. This is so that if any unforseen problems occur, such as much higher than expected intrinsic capacitances being formed for example, these values will need to be changed to produce the desired operations.

		Layout of Op-Amp
Schematic of Op-Amp

Our implementation of the Op-amp used in the summing amplifier and the low pass filter was a modified version of one given in the notes. We just cascoded the current mirrors and made the transistors wider to support higher current flow.

Schematic of Summing Amplifier		Layout of Summing Amplifier

The summing amplifer we used was also similar to one given in the class notes. Each wave input will have its own frequency and amplitude, so we need to add the individual amplitudes at their corresponding frequency rates. There are two pass gates per tone, operated at the output clock frequency of each channel, which decide the input to the summing amplifier. If the clock is high on a particular channel, the appropriate voltage (given by the tone's magnitude, stored in each channel) is applied to the input. If the clock is low, then Gnd is provided to the input.

Following the passgates is a set of four capacitor "banks," one for each channel, which store the charge accumulated over a clock pulse. On the output, charge redistribution occurs, so that all the voltage developed over each branch will balance across all four branchs and yield one fourth of the total charge sum. This voltage then connects to the negative terminal of the next part of summing amplifier, the transconductance amplifier (a "sense amplifier").

Input into the transconductance amplifier is the average charge summation at the negative terminal, and the reference voltage Vref at the positive terminal. Vref is the voltage over which the output waveform will be centered. For viewing purposes we chose Vref = 2.5V so the output wave would be centered over a range of about 0 to 5.0V.

The feedback of the trans. amp. is a capacitor in parallel with a resistor. Resistors are notoriously difficult to implement in CMOS and maintain a linear transfer characteristic along with not taking up too much space. The solution was to use an NMOS and PMOS transistor in series. The gates of these are attached to pins and have bias voltages of Vref plus/minus 0.5V respectively. The resistor must be there to allow an actual DC voltage change at Vout. The capacitor only passes the AC portion of the wave, so without both of these components the summation could not occur.

In general this circuit can be seen as an inverting amplifier with gain Cf (for the feedback capacitor) divided by 4Ci (equivalent capacitance of four capacitors in parallel at the input). The output in our case is the sum of the input tone amplitudes times the gain added to a reference voltage. The output of this is then applied to the low pass filter:

Schematic of 2nd order low pass filter
		Layout of 2nd order low pass filter

Derivation of Transfer Function		To make this a Butterworth low pass filter, the first thing we did was write down the transfer function of this schematic. This is derived using the simple rules associated with operational amplifiers discussed in our notes and in class. The definition of a butterworth filter describes the transfer function of the filter as having two poles with negative real parts. They are complex and are located at -135o and +135o in the complex plane. So to avoid oscillation and have a real butterworth filter we had to fit our equation to this constraint.

Derivation of g to Q relationship		Using the -135o and +135o pole location definition of a Butterworth filter, we solved a general second order transfer function in terms of s and its conjugate. We then set this value equal to the result obtained from the derivation of the transfer function of our schematic and determined how the g and Q were related. We determined that Q is related to g by a factor of two minus the square root of two.

The next step was determining the transconductance values (g and Q) for each cutoff frequency (f_c). These values were obtained by using the equations
(1) w=g/c
(2) w=2*Pi*f_c
(3) g = dI/(v₂-v₁)
in conjunction with the transconductance amplifier characteristic plots of Iout vs (v₂-v₁), and Iout as function of Vbias.

		Here we plotted Iout as a function of v2. We went about this plot by fixing v1 at 2V and then sweeping v2. From this graph we observe the slope. The slope corresponds to our transconductance value. What we aim for here is a large range over which the slope (transconductance value) is constant. Our inputs will depend on our tone amplitudes, values over which we have little control. Therefore to be safe we played with values until we reached a comfortable 0.1V deviation range. Basically this means that as long as the difference between our inputs (to trans amp) lie within the 0.1V range, the lowpass filter will work correctly.
Solving for dI

		Using this dV and the relationship g=dI/dV, we then solve for I. Now all we do is find the Vbias corresponding to I. This is achieved by observing the Iout vs. Vbias relationship of our transconductance. We trace our predetermined I to the plotted curve. Our corresponding Vbias is the one we want.
Solving for Vbias

The V_bias solved for in the last step will be the g values we want for each of the respective cutoff frequencies in the low pass filter. We then solve for Q using the relationship found earlier. All these values are located in the pinout table.