Students will individually design, layout, test, and demonstrate a
VLSI system-on-chip. Chips will be fabricated through the MOSIS Educational Program, and tested in the
second semester. Results of the project will be in the public domain.
Grading will span two semesters, and be based on quality of the
design, in-class presentation of design and results of simulations and
testing, and demonstrated performance of the chip. Both semesters
need to be completed in order to receive course credit.
Typical projects will include CMOS computational imagers, video and
speech coders, pattern recognition processors, and biointerfaces. For
- Wide dynamic range digital CMOS imager: APS (active pixel
sensor) integrating imager with CDS (correlated double sampling) and
row-parallel A/D conversion. Wide dynamic range can be accomplished
through pixel-level adaptive control of integration reset.
Demonstration of the imager under variable lighting and contrast
- Micropower acoustic front-end: log-domain filterbank for
coding of spectral energy features as a front end for speech
recognition. Power dissipation should be less than 100uW to be
competitive with state of the art. Demonstration with microphone
input and acquisition of digital outputs on a computer for speech
- AdaBoost adaptive tree-based classifier: digital CMOS
design for adaptive classification based on binary decision trees, and
an adaptive boosting algorithm that continually refines the tree
structure based on observed classification errors. Parallel
architecture is desirable. Demonstration on an image classification
task, interfacing with a digital imager or computer database.
September 8, 2004