520.492: Mixed-Signal VLSI Systems

 

Design Projects

Spring 2005

 

The VLSI experience gained in the course culminates in the class design project, which takes students through a complete design cycle, from an algorithmic and system-level description to transistor-level implementation in an integrated circuit. Groups of two or three students design and layout a VLSI system-on-a-chip using the Cadence CAD tools, including post-layout verification and simulation.  Select designs are fabricated through MOSIS, and laboratory facilities are available for testing after the course.

 

Students in class work closely together with and receive guidance from graduate students in the Adaptive Microsystems Laboratory. This provides for valuable research training experience for the students in class, and also educational training experience for the graduate students in the laboratory.

 

Detailed instructions and guidelines for the project can be found here. Information on Spring 2005 design projects appears below, with links to the final reports. Previous design projects are archived here.





Last updated 5/23/2005, Gert Cauwenberghs <gert@jhu.edu>