520.776 Learning on Silicon

Johns Hopkins University
Spring 2004

Silicon models of adaptive neural computation. Topics include on-line learning architecture, on-chip and chip-in-the-loop learning, support vector "machines" in silicon, analog and mixed-signal adaptive VLSI circuits, and technology directions. Students in groups will design and implement a learning machine on a chip fabricated through the MOSIS foundry.

Instructor: Prof. Gert Cauwenberghs, Barton 209/400B, gert@jhu.edu

Time and location: Th 1:30-4, Barton 225




  • Learning on Silicon-- Adaptive VLSI Neural Systems, G. Cauwenberghs and M. Bayoumi, Eds., Norwell MA: Kluwer Academic, 1999.
  • Adaptive Analog VLSI Neural Systems, M.A. Jabri, R.J. Coggins and B.G. Flower, Chapman Hall, 1996.
  • Analog VLSI and Neural Systems, C.A. Mead, Reading MA: Addison-Wesley, 1989.


  • "Neuromorphic Learning VLSI Systems: A Survey," G. Cauwenberghs, in T.S. Lande, Ed., Neuromorphic Systems Engineering, Norwell MA: Kluwer Academic, 1998.
  • "Analog VLSI Stochastic Perturbative Learning Architectures," G. Cauwenberghs, in T.S. Lande, Ed., Neuromorphic Systems Engineering, Norwell MA: Kluwer Academic, 1998.
  • "Silicon Support Vector Machine with On-Line Learning," R. Genov, S. Chakrabartty and G. Cauwenberghs, Int. J. Pattern Recognition and Artificial Intelligence, vol. 17 (3), pp. 385-404, 2003.
  • "Kerneltron: Support Vector Machine in Silicon," R. Genov and G. Cauwenberghs, IEEE Trans. Neural Networks, vol. 14 (5), pp. 1426-1434, 2003.
  • "Mixed-Signal Real-Time Adaptive Blind Source Separation," A. Celik, M. Stanacevic and G. Cauwenberghs, Proc. IEEE Int. Symp. Circuits and Systems (ISCAS'2004), Vancouver Canada, May 23-26, 2004.
  • "Micropower Mixed-Signal Acoustic Localizer," M. Stanacevic and G. Cauwenberghs, Proc. IEEE Eur. Solid State Circuits Conf. (ESSCIRC 2003), Estoril Portugal, Sept. 16-18, 2003.
  • "Spike Timing-Dependent Plasticity in the Address Domain," R.J. Vogelstein, F. Tenore, R. Philipp, M.S. Adlerstein, D.H. Goldberg, and G. Cauwenberghs, Adv. Neural Information Processing Systems (NIPS'2002), Cambridge: MIT Press, vol. 15, 2003.
  • "Probabilistic Synaptic Weighting in a Reconfigurable Network of VLSI Integrate-and-Fire Neurons," D.H. Goldberg, G. Cauwenberghs and A.G. Andreou, Neural Networks, vol. 14 (6-7), pp. 781-793, Aug. 2001.
  • "AdOpt: Analog VLSI Stochastic Optimization for Adaptive Optics," M. Cohen, R.T. Edwards, G. Cauwenberghs, M. Vorontsov and G. Carhart, Proc. Int. Joint Conf. Neural Networks (IJCNN'99), Washington DC, vol. 4, pp. 2343-2346, 1999.

    Gert Cauwenberghs
    January 29, 2004